Electronic Design

Design-For-Test The Smart Way: dFT With A "Big T" And A "Little d"

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...
Electronic Design

ATE – Design for Test – Putting Memory to the Test in Nanometer Designs

Memory test at-speed isn't easy but can be achieved by balancing test selection, area overhead, and test-time constraints. The semiconductor industry has intensified its focus on yield issues to meet ...
EDN

Tackling test challenges for low-power design

With the move to advanced process technologies, concerns over device power once largely limited to specialized markets have escalated rapidly among mainstream designers. More semiconductor companies ...
Semiconductor Engineering

Hyperconvergence Of Design For Test And Physical Design

In today’s highly competitive semiconductor industry, chip-design companies strive for competitive advantages by optimizing designs for PPA (Power, Performance, Area). Along with the functional logic, ...
EDN

Payoffs from linking design and test

In too many instances, test is still an afterthought of design, which slows the development process and lengthens time to market. Dr. James Truchard of National Instruments discusses the benefits of ...
Semiconductor Engineering

Design For Test Data

As design pushes deeper into data-driven architectures, so does test. Geir Eide, director for product management of DFT and Tessent Silicon Lifecycle Solutions at Siemens Digital Industries Software, ...
Hackaday

Design For Test Hack Chat

Join us on Wednesday, December 15 at noon Pacific for the Design for Test Hack Chat with Duncan Lowder! If your project is at the breadboard phase, or even if you’ve moved to a PCB prototype, it’s ...