Business Insider

sureCore Delivers Customised Low Power SRAM for Data Intensive Designs

SHEFFIELD, England, March 21, 2019 /PRNewswire/ -- sureCore Limited's new SureFit SRAM customization service has delivered low power high capacity SRAM subsystems implemented in advanced FinFET ...
EDN

Changes force radical rethink of ASIC SRAM

SAN MATEO, Calif. SRAMs embedded in cell-based chip designs are, after years of relative stasis, in the midst of a shakeup. A convergence of factors, both architectural and process-related, is forcing ...
Semiconductor Engineering

Computational SRAM (C-SRAM) Solution Combining In- and Near-Memory Computing Approaches

New academic paper titled “Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution”, from researchers at Univ.
Semiconductor Engineering

Prediction of SRAM Reliability Under Mechanical Stress Induced by Harsh Environments

On the example of a 28nm SRAM array, this work presents a novel reliability study which takes into account the effect of externally applied mechanical stress in circuit simulations. This method is ...
Design-Reuse

Advanced Power Management in Embedded Memory Subsystems

Successful low-power IC designs implement several power management schemes through a comprehensive design, implementation and verification tool chain that understands the power intent. These designs ...
Electronic Design

Should Dual Rail Go Mainstream in Deep Nanometer Era?

Deep sub-nanometer designs are stressed with large process variability. SRAM-bits have the most aggressive design rules in the SoCs, and the most variability. A dual rail solution offsets some of the ...